minimum feature size transistor definition

For example, Intel's former 10 nm process actually has features (the tips of FinFET fins) with a width of 7 nm, so the Intel 10 nm process is similar in transistor density to TSMC's 7 nm process. 350 nm node) however this trend reversed in 2009.

Initially transistor gate length was smaller than that suggested by the process node name (e.g. However, this has not been the case since 1994, and the number of nanometers used to name process nodes (see the International Technology Roadmap for Semiconductors) has become more of a marketing term that has no standardized relation with functional feature sizes or with transistor density (number of transistors per square millimeter). Later each new generation process became known as a technology node or process node, designated by the process's minimum feature size in nanometers (or historically micrometers) of the process's transistor gate length, such as the ' 90 nm process'. In some cases, this allows a simple die shrink of a currently produced chip design to reduce costs, improve performance, and increase transistor density (number of transistors per square millimeter) without the expense of a new design.Įarly semiconductor processes had arbitrary names for generations (viz., HMOS I/II/III/IV and CHMOS III/III-E/IV/V).

Normally a new semiconductor processes has smaller minimum sizes and tighter spacing. Feature size Ī specific semiconductor process has specific rules on the minimum size (width or CD) and spacing for features on each layer of the chip. Fabrication plants need large amounts of liquid nitrogen to maintain the atmosphere inside production machinery and FOUPs, which are constantly purged with nitrogen. This internal atmosphere is known as a mini-environment. The insides of the processing equipment and FOUPs is kept cleaner than the surrounding air in the cleanroom. All machinery and FOUPs contain an internal nitrogen atmosphere. Wafers are transported inside FOUPs, special sealed plastic boxes. Production in advanced fabrication facilities is completely automated and carried out in a hermetically sealed nitrogen environment to improve yield (the percent of microchips that function correctly in a wafer), with automated material handling systems taking care of the transport of wafers from machine to machine. In more advanced semiconductor devices, such as modern 14/ 10/ 7 nm nodes, fabrication can take up to 15 weeks, with 11–13 weeks being the industry average. The fabrication process is performed in highly specialized semiconductor fabrication plants, also called foundries or 'fabs', with the central part being the ' clean room'. Silicon is almost always used, but various compound semiconductors are used for specialized applications. It is a multiple-step photolithographic and physio-chemical process (with steps such as thermal oxidation, thin-film deposition, ion-implantation, etching) during which electronic circuits are gradually created on a wafer, typically made of pure single-crystal semiconducting material. Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as computer processors, microcontrollers, and memory chips (such as NAND flash and DRAM) that are present in everyday electrical and electronic devices. Photo of the interior of a clean room of a 300mm fab run by TSMC NASA's Glenn Research Center clean room External image

Minimum feature size transistor definition